The PI6C10804 is a 1.5V to 2.5V high-speed,low-noisel:4 non-inverting clock buffer. The key goal in designing thePI6C10804 is to target networking applications that require low-skew, low-jitter, and high-frequency clock distribution.
Providing output-to-output skew as low as 70ps, the Pl6C10804is an ideal clock distribution device for synchronous systems. De-signing synchronous networking systems requires a tight level ofskew from a large number of outputs.